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Untitled Document
ECC and Registered Memory
For a home machine, except in the case of the now obsolete Socket 940 Athlon
FX, memory should be unbuffered (i.e not registered), non-ECC memory. These
are technologies traditionally saved for servers and some mission critical workstations.
But for those who are curious of mind should read on.
Put simply, registered memory has a buffer which holds data before it is passed
to the memory to make sure it is in sync. This introduces latency and can also
hinder overclocking. Most boards do not support this type of memory, except
Opterons, the Socket 940 Athlon 64 FX and most dual CPU and server boards.
ECC stands for Error Correcting Codes. This memory has special circuitry that
tests the accuracy of data as it passes to and from the memory. A lot of this
checking is based on the principle of parity memory.
With parity memory, for every 8bits (a byte) a 9th bit called the
check bit is also stored. The check bit is set according to a simple mathematical
calculation. If the number of 1’s in the sequence is even, the parity bit is
set to 1, if there are an odd number of 1’s the parity bit is set to 0. Therefore,
if one of the bits is corrupted, the check bit will not tally when the calculation
is done again. This system is not full proof though, as two bits could be corrupted
and the system would let it through. This is why the more advanced ECC memory
system was invented. This uses strange groupings such as 7Bits for every 32Bits,
allowing it to have more complex calculations.
Unlike parity, ECC can detect when 2, 3 or even 4 bits have been corrupted,
but it can only correct a single bit error. On the plus side, it can do this
on the fly, without the operating system ever needing to know. This does give
a slight performance hit of 2-3%.
Both ECC and registered memory cost more than un-buffered memory and for most
readers, should be avoided.
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