Frequency, Bandwidth and DDR

SDR (Single Data Rate) SDRAM was first introduced as PC66, PC100 and eventually PC133. They run on a 64-Bit bus and can deal with 1bit of data per clock. This gives a theoretical bandwidth for a PC133 module at (64 x 133 x 1) / 8, which is 1064MB/s.

What is now a few years ago, it was decided that this wasn’t enough bandwidth for modern CPUs. At this point DDR memory was released. This has the ability to deal with 2 bits of data per clock, hence Double Data Rate. This means that 133MHz memory would be running at an effective frequency of 266MHz. When calculated at (64 x 133 x 2) / 8, we get 2128MB/s which is double that of PC133. This is also where the name PC2100 comes from, describing the theoretical bandwidth. This is of course merely marketing.

In almost all real world situations, you will find that the actual bandwidth available is no where near the theoretical bandwidth. This is because the calculation doesn’t take latency into account, something which is impossible to predict as different situations react in different ways to the different latencies.

The recently introduced DDR-II is merely an extension of DDR. Instead of handing 2 bits per clock, it can handle 4. This gives a 133MHz chip an effective frequency of 533MHz and a theoretical bandwidth of (64 x 133 x 4) / 8 = 4256MB/s, which is double that of 266MHz DDR.

So we know that changing the frequency, and changing the amount of bits per clock that can be dealt with, will change theoretical bandwidth. The final variable that can be changed to affect bandwidth is of course the bus width.

In all the examples above, the bus width has been a fixed 64-Bit. With the introduction of the nForce 2 platform, we saw dual channel memory support. This requires the use of two memory modules in the system, which get run off independent memory controllers. The effect of this is the bus width is doubled and therefore in theory, so is the bandwidth. Using our example above with 133MHz DDR memory, this would now be (128 x 133 x 2) / 8 = 4256MB/s which is in theory the equivalent of single channel DDR-II. This was however implemented quite badly on the nForce 2 platform and makes very little difference at all, unlike implementations on the Athlon 64 platform.

SDR, DDR and DDR-II memory all have different pin counts and are not backwards compatible. Some motherboards will have support for multiple memory types, which gives you a better choice on what memory to use.

FSB and Memory Speed

Traditionally, the memory frequency would always be equal to the front side bus. For instance, a processor running on a 100MHz FSB would have memory running at 100MHz also. If you put 133MHz memory in the system, it would merely run it at a lower speed and no benefit would be seen. Almost all modern boards have the ability to run memory asynchronously to the front side bus, often in both directions. This means you can use both memory that is specified for a higher or lower frequency than the front side bus, although this is specific to motherboard manufacturers desires.

This feature has the added bonus that the 266MHz memory that you invested in not too long ago, may not be quite as useless as you think. Similarly, investing in higher clock speed memory may finally give a performance increase.

If you mix memory speeds (for instance 266MHz CAS 3 and 400MHz CAS 2), the system will run all the memory at the speed and latency of your slowest memory module. Unless you fancy a little overclocking, that is.

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